Traditionally data processing system execute a sequence of instruction one at a time. In a data processing system including multiple processing units, usually the decoding of the instructions is centralized to insure that each instruction is decoded according to its position in the sequence.
IBM Technical Disclosure Bulletin, Volume 25, Number 3B, August, 1982, pages 1637-1638, entitled "Multiprocessor Synchronization Design Method" discloses a process whereby collection of processors can determine simultaneously whether any of them is an a specified state. At the end of the process all processors will have agreed upon there current mutual status.
IBM Technical Disclosure Bulletin, Volume 30, Number 7, December, 1987, pages 98-99, entitled "Synchronization Processing Elements for Highly Parallel Multiprocessors Systems" disclose a technique whereby multiprocessing computer architecture enhanced through the use of a synchronization processing element to minimize the synchronization overhead in a highly parallel multiprocessor computer system.
IBM Technical Disclosure Bulletin, Volume 29, Number 10, March, 1987, entitled "Run-Time Algorithm for Distributed Processing Synchronization and Address Calculations", page 4658-4687 discloses run time algorithms which a resident in each distributed processing element of a distributed processing architecture. These run time algorithms implement scheduling an address calculation for each of the distributing processing elements in a coordinated matter with the other distributed processing elements in a network.
It is the object of the present invention to provide a multiprocessing system to execute a sequence of instructions in a manner that appears that the instructions are executed in sequence even though the actual execution of individual instruction by individual processors maybe out of sequence.